LCOV - code coverage report

Current view: top level - js/src/jit/x64 - BaseAssembler-x64.h (source / functions) Hit Total Coverage Test: output.info Lines: 214 509 42.0 % Date: 2017-07-14 16:53:18 Functions: 43 98 43.9 % Legend: Lines: hit not hit

Function Name	Hit count
_ZN2js3jit11X86Encoding16BaseAssemblerX6410popcntq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6410testq_i32mEiiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX6411immediate64El	1
_ZN2js3jit11X86Encoding16BaseAssemblerX6411vmovsd_riprENS1_13XMMRegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6411vmovss_riprENS1_13XMMRegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6412vcvtsq2sd_rrENS1_10RegisterIDENS1_13XMMRegisterIDES4_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6412vcvtsq2ss_rrENS1_10RegisterIDENS1_13XMMRegisterIDES4_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6412vmovaps_riprENS1_13XMMRegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6412vmovdqa_riprENS1_13XMMRegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6413vcvttsd2sq_rrENS1_13XMMRegisterIDENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6413vcvttss2sq_rrENS1_13XMMRegisterIDENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6416twoByteRipOpSimdEPKcNS1_14VexOperandTypeENS1_15TwoByteOpcodeIDENS1_13XMMRegisterIDES7_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX6418twoByteOpInt64SimdEPKcNS1_14VexOperandTypeENS1_15TwoByteOpcodeIDENS1_10RegisterIDENS1_13XMMRegisterIDES8_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX6418twoByteOpSimdInt64EPKcNS1_14VexOperandTypeENS1_15TwoByteOpcodeIDENS1_13XMMRegisterIDENS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX643cqoEv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX646divq_rENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX646negq_rENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX646orq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX646orq_mrEPKvNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX646orq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX646orq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647addq_imEiPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647addq_imEiiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647addq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647addq_mrEPKvNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647addq_mrEiNS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647addq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647andq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647andq_mrEPKvNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647andq_mrEiNS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647andq_mrEiNS1_10RegisterIDES3_iS3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647andq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647bsfq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647bsrq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_imEiPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_imEiiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_imEiiNS1_10RegisterIDES3_i	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_rmENS1_10RegisterIDEPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_rmENS1_10RegisterIDEiS3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647cmpq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647idivq_rENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647jmp_ripEi	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647leaq_mrEiNS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647leaq_mrEiNS1_10RegisterIDES3_iS3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_mrEPKvNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_mrEiNS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_mrEiNS1_10RegisterIDES3_iS3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_rmENS1_10RegisterIDEPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_rmENS1_10RegisterIDEiS3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_rmENS1_10RegisterIDEiS3_S3_i	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647movq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647rolq_irEiNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647rorq_irEiNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647sarq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647shlq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647shrq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647subq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647subq_mrEPKvNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647subq_mrEiNS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647subq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647xorq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX647xorq_mrEPKvNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647xorq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX647xorq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648imulq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648imulq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648rolq_CLrENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648rorq_CLrENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648sarq_CLrENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648shlq_CLrENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648shrq_CLrENS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX648testq_irEiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX648testq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX648vmovq_rrENS1_10RegisterIDENS1_13XMMRegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX648vmovq_rrENS1_13XMMRegisterIDENS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX648xchgq_rrENS1_10RegisterIDES3_	1
_ZN2js3jit11X86Encoding16BaseAssemblerX649addq_i32rEiNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649cmovzq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649cmovzq_mrEiNS1_10RegisterIDES3_iS3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649cmovzq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_EAXmEPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_i32mEiPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_i32mEiiNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_i32mEiiNS1_10RegisterIDES3_i	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_i32rEiNS1_10RegisterIDE	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_i64rElNS1_10RegisterIDE	1
_ZN2js3jit11X86Encoding16BaseAssemblerX649movq_mEAXEPKv	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movsbq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movsbq_mrEiNS1_10RegisterIDES3_iS3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movslq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movslq_mrEiNS1_10RegisterIDES3_iS3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movslq_rrENS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movswq_mrEiNS1_10RegisterIDES3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX649movswq_mrEiNS1_10RegisterIDES3_iS3_	0
_ZN2js3jit11X86Encoding16BaseAssemblerX64C2Ev	1
_ZN2js3jit11X86Encoding16BaseAssemblerX64D2Ev	1

Generated by: LCOV version 1.13