Line data Source code
1 : /*
2 : * Copyright (c) 2016, Alliance for Open Media. All rights reserved
3 : *
4 : * This source code is subject to the terms of the BSD 2 Clause License and
5 : * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 : * was not distributed with this source code in the LICENSE file, you can
7 : * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 : * Media Patent License 1.0 was not distributed with this source code in the
9 : * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 : */
11 : #include <assert.h>
12 : #include <immintrin.h>
13 :
14 : #include "./av1_rtcd.h"
15 : #include "./aom_config.h"
16 : #include "av1/common/av1_inv_txfm1d_cfg.h"
17 :
18 : // Note:
19 : // Total 32x4 registers to represent 32x32 block coefficients.
20 : // For high bit depth, each coefficient is 4-byte.
21 : // Each __m256i register holds 8 coefficients.
22 : // So each "row" we needs 4 register. Totally 32 rows
23 : // Register layout:
24 : // v0, v1, v2, v3,
25 : // v4, v5, v6, v7,
26 : // ... ...
27 : // v124, v125, v126, v127
28 :
29 0 : static void transpose_32x32_8x8(const __m256i *in, __m256i *out) {
30 : __m256i u0, u1, u2, u3, u4, u5, u6, u7;
31 : __m256i x0, x1;
32 :
33 0 : u0 = _mm256_unpacklo_epi32(in[0], in[4]);
34 0 : u1 = _mm256_unpackhi_epi32(in[0], in[4]);
35 :
36 0 : u2 = _mm256_unpacklo_epi32(in[8], in[12]);
37 0 : u3 = _mm256_unpackhi_epi32(in[8], in[12]);
38 :
39 0 : u4 = _mm256_unpacklo_epi32(in[16], in[20]);
40 0 : u5 = _mm256_unpackhi_epi32(in[16], in[20]);
41 :
42 0 : u6 = _mm256_unpacklo_epi32(in[24], in[28]);
43 0 : u7 = _mm256_unpackhi_epi32(in[24], in[28]);
44 :
45 0 : x0 = _mm256_unpacklo_epi64(u0, u2);
46 0 : x1 = _mm256_unpacklo_epi64(u4, u6);
47 0 : out[0] = _mm256_permute2f128_si256(x0, x1, 0x20);
48 0 : out[16] = _mm256_permute2f128_si256(x0, x1, 0x31);
49 :
50 0 : x0 = _mm256_unpackhi_epi64(u0, u2);
51 0 : x1 = _mm256_unpackhi_epi64(u4, u6);
52 0 : out[4] = _mm256_permute2f128_si256(x0, x1, 0x20);
53 0 : out[20] = _mm256_permute2f128_si256(x0, x1, 0x31);
54 :
55 0 : x0 = _mm256_unpacklo_epi64(u1, u3);
56 0 : x1 = _mm256_unpacklo_epi64(u5, u7);
57 0 : out[8] = _mm256_permute2f128_si256(x0, x1, 0x20);
58 0 : out[24] = _mm256_permute2f128_si256(x0, x1, 0x31);
59 :
60 0 : x0 = _mm256_unpackhi_epi64(u1, u3);
61 0 : x1 = _mm256_unpackhi_epi64(u5, u7);
62 0 : out[12] = _mm256_permute2f128_si256(x0, x1, 0x20);
63 0 : out[28] = _mm256_permute2f128_si256(x0, x1, 0x31);
64 0 : }
65 :
66 0 : static void transpose_32x32_16x16(const __m256i *in, __m256i *out) {
67 0 : transpose_32x32_8x8(&in[0], &out[0]);
68 0 : transpose_32x32_8x8(&in[1], &out[32]);
69 0 : transpose_32x32_8x8(&in[32], &out[1]);
70 0 : transpose_32x32_8x8(&in[33], &out[33]);
71 0 : }
72 :
73 0 : static void transpose_32x32(const __m256i *in, __m256i *out) {
74 0 : transpose_32x32_16x16(&in[0], &out[0]);
75 0 : transpose_32x32_16x16(&in[2], &out[64]);
76 0 : transpose_32x32_16x16(&in[64], &out[2]);
77 0 : transpose_32x32_16x16(&in[66], &out[66]);
78 0 : }
79 :
80 0 : static void load_buffer_32x32(const int32_t *coeff, __m256i *in) {
81 : int i;
82 0 : for (i = 0; i < 128; ++i) {
83 0 : in[i] = _mm256_loadu_si256((const __m256i *)coeff);
84 0 : coeff += 8;
85 : }
86 0 : }
87 :
88 0 : static void round_shift_32x32(__m256i *in, int shift) {
89 0 : __m256i rnding = _mm256_set1_epi32(1 << (shift - 1));
90 0 : int i = 0;
91 :
92 0 : while (i < 128) {
93 0 : in[i] = _mm256_add_epi32(in[i], rnding);
94 0 : in[i] = _mm256_srai_epi32(in[i], shift);
95 0 : i++;
96 : }
97 0 : }
98 :
99 0 : static __m256i highbd_clamp_epi32(__m256i x, int bd) {
100 0 : const __m256i zero = _mm256_setzero_si256();
101 0 : const __m256i one = _mm256_set1_epi16(1);
102 0 : const __m256i max = _mm256_sub_epi16(_mm256_slli_epi16(one, bd), one);
103 : __m256i clamped, mask;
104 :
105 0 : mask = _mm256_cmpgt_epi16(x, max);
106 0 : clamped = _mm256_andnot_si256(mask, x);
107 0 : mask = _mm256_and_si256(mask, max);
108 0 : clamped = _mm256_or_si256(mask, clamped);
109 0 : mask = _mm256_cmpgt_epi16(clamped, zero);
110 0 : clamped = _mm256_and_si256(clamped, mask);
111 :
112 0 : return clamped;
113 : }
114 :
115 0 : static void write_buffer_32x32(__m256i *in, uint16_t *output, int stride,
116 : int fliplr, int flipud, int shift, int bd) {
117 : __m256i u0, u1, x0, x1, x2, x3, v0, v1, v2, v3;
118 0 : const __m256i zero = _mm256_setzero_si256();
119 0 : int i = 0;
120 : (void)fliplr;
121 : (void)flipud;
122 :
123 0 : round_shift_32x32(in, shift);
124 :
125 0 : while (i < 128) {
126 0 : u0 = _mm256_loadu_si256((const __m256i *)output);
127 0 : u1 = _mm256_loadu_si256((const __m256i *)(output + 16));
128 :
129 0 : x0 = _mm256_unpacklo_epi16(u0, zero);
130 0 : x1 = _mm256_unpackhi_epi16(u0, zero);
131 0 : x2 = _mm256_unpacklo_epi16(u1, zero);
132 0 : x3 = _mm256_unpackhi_epi16(u1, zero);
133 :
134 0 : v0 = _mm256_permute2f128_si256(in[i], in[i + 1], 0x20);
135 0 : v1 = _mm256_permute2f128_si256(in[i], in[i + 1], 0x31);
136 0 : v2 = _mm256_permute2f128_si256(in[i + 2], in[i + 3], 0x20);
137 0 : v3 = _mm256_permute2f128_si256(in[i + 2], in[i + 3], 0x31);
138 :
139 0 : v0 = _mm256_add_epi32(v0, x0);
140 0 : v1 = _mm256_add_epi32(v1, x1);
141 0 : v2 = _mm256_add_epi32(v2, x2);
142 0 : v3 = _mm256_add_epi32(v3, x3);
143 :
144 0 : v0 = _mm256_packus_epi32(v0, v1);
145 0 : v2 = _mm256_packus_epi32(v2, v3);
146 :
147 0 : v0 = highbd_clamp_epi32(v0, bd);
148 0 : v2 = highbd_clamp_epi32(v2, bd);
149 :
150 : _mm256_storeu_si256((__m256i *)output, v0);
151 0 : _mm256_storeu_si256((__m256i *)(output + 16), v2);
152 0 : output += stride;
153 0 : i += 4;
154 : }
155 0 : }
156 :
157 0 : static INLINE __m256i half_btf_avx2(const __m256i *w0, const __m256i *n0,
158 : const __m256i *w1, const __m256i *n1,
159 : const __m256i *rounding, int bit) {
160 : __m256i x, y;
161 :
162 0 : x = _mm256_mullo_epi32(*w0, *n0);
163 0 : y = _mm256_mullo_epi32(*w1, *n1);
164 0 : x = _mm256_add_epi32(x, y);
165 0 : x = _mm256_add_epi32(x, *rounding);
166 0 : x = _mm256_srai_epi32(x, bit);
167 0 : return x;
168 : }
169 :
170 0 : static void idct32_avx2(__m256i *in, __m256i *out, int bit) {
171 0 : const int32_t *cospi = cospi_arr(bit);
172 0 : const __m256i cospi62 = _mm256_set1_epi32(cospi[62]);
173 0 : const __m256i cospi30 = _mm256_set1_epi32(cospi[30]);
174 0 : const __m256i cospi46 = _mm256_set1_epi32(cospi[46]);
175 0 : const __m256i cospi14 = _mm256_set1_epi32(cospi[14]);
176 0 : const __m256i cospi54 = _mm256_set1_epi32(cospi[54]);
177 0 : const __m256i cospi22 = _mm256_set1_epi32(cospi[22]);
178 0 : const __m256i cospi38 = _mm256_set1_epi32(cospi[38]);
179 0 : const __m256i cospi6 = _mm256_set1_epi32(cospi[6]);
180 0 : const __m256i cospi58 = _mm256_set1_epi32(cospi[58]);
181 0 : const __m256i cospi26 = _mm256_set1_epi32(cospi[26]);
182 0 : const __m256i cospi42 = _mm256_set1_epi32(cospi[42]);
183 0 : const __m256i cospi10 = _mm256_set1_epi32(cospi[10]);
184 0 : const __m256i cospi50 = _mm256_set1_epi32(cospi[50]);
185 0 : const __m256i cospi18 = _mm256_set1_epi32(cospi[18]);
186 0 : const __m256i cospi34 = _mm256_set1_epi32(cospi[34]);
187 0 : const __m256i cospi2 = _mm256_set1_epi32(cospi[2]);
188 0 : const __m256i cospim58 = _mm256_set1_epi32(-cospi[58]);
189 0 : const __m256i cospim26 = _mm256_set1_epi32(-cospi[26]);
190 0 : const __m256i cospim42 = _mm256_set1_epi32(-cospi[42]);
191 0 : const __m256i cospim10 = _mm256_set1_epi32(-cospi[10]);
192 0 : const __m256i cospim50 = _mm256_set1_epi32(-cospi[50]);
193 0 : const __m256i cospim18 = _mm256_set1_epi32(-cospi[18]);
194 0 : const __m256i cospim34 = _mm256_set1_epi32(-cospi[34]);
195 0 : const __m256i cospim2 = _mm256_set1_epi32(-cospi[2]);
196 0 : const __m256i cospi60 = _mm256_set1_epi32(cospi[60]);
197 0 : const __m256i cospi28 = _mm256_set1_epi32(cospi[28]);
198 0 : const __m256i cospi44 = _mm256_set1_epi32(cospi[44]);
199 0 : const __m256i cospi12 = _mm256_set1_epi32(cospi[12]);
200 0 : const __m256i cospi52 = _mm256_set1_epi32(cospi[52]);
201 0 : const __m256i cospi20 = _mm256_set1_epi32(cospi[20]);
202 0 : const __m256i cospi36 = _mm256_set1_epi32(cospi[36]);
203 0 : const __m256i cospi4 = _mm256_set1_epi32(cospi[4]);
204 0 : const __m256i cospim52 = _mm256_set1_epi32(-cospi[52]);
205 0 : const __m256i cospim20 = _mm256_set1_epi32(-cospi[20]);
206 0 : const __m256i cospim36 = _mm256_set1_epi32(-cospi[36]);
207 0 : const __m256i cospim4 = _mm256_set1_epi32(-cospi[4]);
208 0 : const __m256i cospi56 = _mm256_set1_epi32(cospi[56]);
209 0 : const __m256i cospi24 = _mm256_set1_epi32(cospi[24]);
210 0 : const __m256i cospi40 = _mm256_set1_epi32(cospi[40]);
211 0 : const __m256i cospi8 = _mm256_set1_epi32(cospi[8]);
212 0 : const __m256i cospim40 = _mm256_set1_epi32(-cospi[40]);
213 0 : const __m256i cospim8 = _mm256_set1_epi32(-cospi[8]);
214 0 : const __m256i cospim56 = _mm256_set1_epi32(-cospi[56]);
215 0 : const __m256i cospim24 = _mm256_set1_epi32(-cospi[24]);
216 0 : const __m256i cospi32 = _mm256_set1_epi32(cospi[32]);
217 0 : const __m256i cospim32 = _mm256_set1_epi32(-cospi[32]);
218 0 : const __m256i cospi48 = _mm256_set1_epi32(cospi[48]);
219 0 : const __m256i cospim48 = _mm256_set1_epi32(-cospi[48]);
220 0 : const __m256i cospi16 = _mm256_set1_epi32(cospi[16]);
221 0 : const __m256i cospim16 = _mm256_set1_epi32(-cospi[16]);
222 0 : const __m256i rounding = _mm256_set1_epi32(1 << (bit - 1));
223 : __m256i bf1[32], bf0[32];
224 : int col;
225 :
226 0 : for (col = 0; col < 4; ++col) {
227 : // stage 0
228 : // stage 1
229 0 : bf1[0] = in[0 * 4 + col];
230 0 : bf1[1] = in[16 * 4 + col];
231 0 : bf1[2] = in[8 * 4 + col];
232 0 : bf1[3] = in[24 * 4 + col];
233 0 : bf1[4] = in[4 * 4 + col];
234 0 : bf1[5] = in[20 * 4 + col];
235 0 : bf1[6] = in[12 * 4 + col];
236 0 : bf1[7] = in[28 * 4 + col];
237 0 : bf1[8] = in[2 * 4 + col];
238 0 : bf1[9] = in[18 * 4 + col];
239 0 : bf1[10] = in[10 * 4 + col];
240 0 : bf1[11] = in[26 * 4 + col];
241 0 : bf1[12] = in[6 * 4 + col];
242 0 : bf1[13] = in[22 * 4 + col];
243 0 : bf1[14] = in[14 * 4 + col];
244 0 : bf1[15] = in[30 * 4 + col];
245 0 : bf1[16] = in[1 * 4 + col];
246 0 : bf1[17] = in[17 * 4 + col];
247 0 : bf1[18] = in[9 * 4 + col];
248 0 : bf1[19] = in[25 * 4 + col];
249 0 : bf1[20] = in[5 * 4 + col];
250 0 : bf1[21] = in[21 * 4 + col];
251 0 : bf1[22] = in[13 * 4 + col];
252 0 : bf1[23] = in[29 * 4 + col];
253 0 : bf1[24] = in[3 * 4 + col];
254 0 : bf1[25] = in[19 * 4 + col];
255 0 : bf1[26] = in[11 * 4 + col];
256 0 : bf1[27] = in[27 * 4 + col];
257 0 : bf1[28] = in[7 * 4 + col];
258 0 : bf1[29] = in[23 * 4 + col];
259 0 : bf1[30] = in[15 * 4 + col];
260 0 : bf1[31] = in[31 * 4 + col];
261 :
262 : // stage 2
263 0 : bf0[0] = bf1[0];
264 0 : bf0[1] = bf1[1];
265 0 : bf0[2] = bf1[2];
266 0 : bf0[3] = bf1[3];
267 0 : bf0[4] = bf1[4];
268 0 : bf0[5] = bf1[5];
269 0 : bf0[6] = bf1[6];
270 0 : bf0[7] = bf1[7];
271 0 : bf0[8] = bf1[8];
272 0 : bf0[9] = bf1[9];
273 0 : bf0[10] = bf1[10];
274 0 : bf0[11] = bf1[11];
275 0 : bf0[12] = bf1[12];
276 0 : bf0[13] = bf1[13];
277 0 : bf0[14] = bf1[14];
278 0 : bf0[15] = bf1[15];
279 0 : bf0[16] =
280 0 : half_btf_avx2(&cospi62, &bf1[16], &cospim2, &bf1[31], &rounding, bit);
281 0 : bf0[17] =
282 0 : half_btf_avx2(&cospi30, &bf1[17], &cospim34, &bf1[30], &rounding, bit);
283 0 : bf0[18] =
284 0 : half_btf_avx2(&cospi46, &bf1[18], &cospim18, &bf1[29], &rounding, bit);
285 0 : bf0[19] =
286 0 : half_btf_avx2(&cospi14, &bf1[19], &cospim50, &bf1[28], &rounding, bit);
287 0 : bf0[20] =
288 0 : half_btf_avx2(&cospi54, &bf1[20], &cospim10, &bf1[27], &rounding, bit);
289 0 : bf0[21] =
290 0 : half_btf_avx2(&cospi22, &bf1[21], &cospim42, &bf1[26], &rounding, bit);
291 0 : bf0[22] =
292 0 : half_btf_avx2(&cospi38, &bf1[22], &cospim26, &bf1[25], &rounding, bit);
293 0 : bf0[23] =
294 0 : half_btf_avx2(&cospi6, &bf1[23], &cospim58, &bf1[24], &rounding, bit);
295 0 : bf0[24] =
296 0 : half_btf_avx2(&cospi58, &bf1[23], &cospi6, &bf1[24], &rounding, bit);
297 0 : bf0[25] =
298 0 : half_btf_avx2(&cospi26, &bf1[22], &cospi38, &bf1[25], &rounding, bit);
299 0 : bf0[26] =
300 0 : half_btf_avx2(&cospi42, &bf1[21], &cospi22, &bf1[26], &rounding, bit);
301 0 : bf0[27] =
302 0 : half_btf_avx2(&cospi10, &bf1[20], &cospi54, &bf1[27], &rounding, bit);
303 0 : bf0[28] =
304 0 : half_btf_avx2(&cospi50, &bf1[19], &cospi14, &bf1[28], &rounding, bit);
305 0 : bf0[29] =
306 0 : half_btf_avx2(&cospi18, &bf1[18], &cospi46, &bf1[29], &rounding, bit);
307 0 : bf0[30] =
308 0 : half_btf_avx2(&cospi34, &bf1[17], &cospi30, &bf1[30], &rounding, bit);
309 0 : bf0[31] =
310 0 : half_btf_avx2(&cospi2, &bf1[16], &cospi62, &bf1[31], &rounding, bit);
311 :
312 : // stage 3
313 0 : bf1[0] = bf0[0];
314 0 : bf1[1] = bf0[1];
315 0 : bf1[2] = bf0[2];
316 0 : bf1[3] = bf0[3];
317 0 : bf1[4] = bf0[4];
318 0 : bf1[5] = bf0[5];
319 0 : bf1[6] = bf0[6];
320 0 : bf1[7] = bf0[7];
321 0 : bf1[8] =
322 0 : half_btf_avx2(&cospi60, &bf0[8], &cospim4, &bf0[15], &rounding, bit);
323 0 : bf1[9] =
324 0 : half_btf_avx2(&cospi28, &bf0[9], &cospim36, &bf0[14], &rounding, bit);
325 0 : bf1[10] =
326 0 : half_btf_avx2(&cospi44, &bf0[10], &cospim20, &bf0[13], &rounding, bit);
327 0 : bf1[11] =
328 0 : half_btf_avx2(&cospi12, &bf0[11], &cospim52, &bf0[12], &rounding, bit);
329 0 : bf1[12] =
330 0 : half_btf_avx2(&cospi52, &bf0[11], &cospi12, &bf0[12], &rounding, bit);
331 0 : bf1[13] =
332 0 : half_btf_avx2(&cospi20, &bf0[10], &cospi44, &bf0[13], &rounding, bit);
333 0 : bf1[14] =
334 0 : half_btf_avx2(&cospi36, &bf0[9], &cospi28, &bf0[14], &rounding, bit);
335 0 : bf1[15] =
336 0 : half_btf_avx2(&cospi4, &bf0[8], &cospi60, &bf0[15], &rounding, bit);
337 0 : bf1[16] = _mm256_add_epi32(bf0[16], bf0[17]);
338 0 : bf1[17] = _mm256_sub_epi32(bf0[16], bf0[17]);
339 0 : bf1[18] = _mm256_sub_epi32(bf0[19], bf0[18]);
340 0 : bf1[19] = _mm256_add_epi32(bf0[18], bf0[19]);
341 0 : bf1[20] = _mm256_add_epi32(bf0[20], bf0[21]);
342 0 : bf1[21] = _mm256_sub_epi32(bf0[20], bf0[21]);
343 0 : bf1[22] = _mm256_sub_epi32(bf0[23], bf0[22]);
344 0 : bf1[23] = _mm256_add_epi32(bf0[22], bf0[23]);
345 0 : bf1[24] = _mm256_add_epi32(bf0[24], bf0[25]);
346 0 : bf1[25] = _mm256_sub_epi32(bf0[24], bf0[25]);
347 0 : bf1[26] = _mm256_sub_epi32(bf0[27], bf0[26]);
348 0 : bf1[27] = _mm256_add_epi32(bf0[26], bf0[27]);
349 0 : bf1[28] = _mm256_add_epi32(bf0[28], bf0[29]);
350 0 : bf1[29] = _mm256_sub_epi32(bf0[28], bf0[29]);
351 0 : bf1[30] = _mm256_sub_epi32(bf0[31], bf0[30]);
352 0 : bf1[31] = _mm256_add_epi32(bf0[30], bf0[31]);
353 :
354 : // stage 4
355 0 : bf0[0] = bf1[0];
356 0 : bf0[1] = bf1[1];
357 0 : bf0[2] = bf1[2];
358 0 : bf0[3] = bf1[3];
359 0 : bf0[4] =
360 0 : half_btf_avx2(&cospi56, &bf1[4], &cospim8, &bf1[7], &rounding, bit);
361 0 : bf0[5] =
362 0 : half_btf_avx2(&cospi24, &bf1[5], &cospim40, &bf1[6], &rounding, bit);
363 0 : bf0[6] =
364 0 : half_btf_avx2(&cospi40, &bf1[5], &cospi24, &bf1[6], &rounding, bit);
365 0 : bf0[7] = half_btf_avx2(&cospi8, &bf1[4], &cospi56, &bf1[7], &rounding, bit);
366 0 : bf0[8] = _mm256_add_epi32(bf1[8], bf1[9]);
367 0 : bf0[9] = _mm256_sub_epi32(bf1[8], bf1[9]);
368 0 : bf0[10] = _mm256_sub_epi32(bf1[11], bf1[10]);
369 0 : bf0[11] = _mm256_add_epi32(bf1[10], bf1[11]);
370 0 : bf0[12] = _mm256_add_epi32(bf1[12], bf1[13]);
371 0 : bf0[13] = _mm256_sub_epi32(bf1[12], bf1[13]);
372 0 : bf0[14] = _mm256_sub_epi32(bf1[15], bf1[14]);
373 0 : bf0[15] = _mm256_add_epi32(bf1[14], bf1[15]);
374 0 : bf0[16] = bf1[16];
375 0 : bf0[17] =
376 0 : half_btf_avx2(&cospim8, &bf1[17], &cospi56, &bf1[30], &rounding, bit);
377 0 : bf0[18] =
378 0 : half_btf_avx2(&cospim56, &bf1[18], &cospim8, &bf1[29], &rounding, bit);
379 0 : bf0[19] = bf1[19];
380 0 : bf0[20] = bf1[20];
381 0 : bf0[21] =
382 0 : half_btf_avx2(&cospim40, &bf1[21], &cospi24, &bf1[26], &rounding, bit);
383 0 : bf0[22] =
384 0 : half_btf_avx2(&cospim24, &bf1[22], &cospim40, &bf1[25], &rounding, bit);
385 0 : bf0[23] = bf1[23];
386 0 : bf0[24] = bf1[24];
387 0 : bf0[25] =
388 0 : half_btf_avx2(&cospim40, &bf1[22], &cospi24, &bf1[25], &rounding, bit);
389 0 : bf0[26] =
390 0 : half_btf_avx2(&cospi24, &bf1[21], &cospi40, &bf1[26], &rounding, bit);
391 0 : bf0[27] = bf1[27];
392 0 : bf0[28] = bf1[28];
393 0 : bf0[29] =
394 0 : half_btf_avx2(&cospim8, &bf1[18], &cospi56, &bf1[29], &rounding, bit);
395 0 : bf0[30] =
396 0 : half_btf_avx2(&cospi56, &bf1[17], &cospi8, &bf1[30], &rounding, bit);
397 0 : bf0[31] = bf1[31];
398 :
399 : // stage 5
400 0 : bf1[0] =
401 0 : half_btf_avx2(&cospi32, &bf0[0], &cospi32, &bf0[1], &rounding, bit);
402 0 : bf1[1] =
403 0 : half_btf_avx2(&cospi32, &bf0[0], &cospim32, &bf0[1], &rounding, bit);
404 0 : bf1[2] =
405 0 : half_btf_avx2(&cospi48, &bf0[2], &cospim16, &bf0[3], &rounding, bit);
406 0 : bf1[3] =
407 0 : half_btf_avx2(&cospi16, &bf0[2], &cospi48, &bf0[3], &rounding, bit);
408 0 : bf1[4] = _mm256_add_epi32(bf0[4], bf0[5]);
409 0 : bf1[5] = _mm256_sub_epi32(bf0[4], bf0[5]);
410 0 : bf1[6] = _mm256_sub_epi32(bf0[7], bf0[6]);
411 0 : bf1[7] = _mm256_add_epi32(bf0[6], bf0[7]);
412 0 : bf1[8] = bf0[8];
413 0 : bf1[9] =
414 0 : half_btf_avx2(&cospim16, &bf0[9], &cospi48, &bf0[14], &rounding, bit);
415 0 : bf1[10] =
416 0 : half_btf_avx2(&cospim48, &bf0[10], &cospim16, &bf0[13], &rounding, bit);
417 0 : bf1[11] = bf0[11];
418 0 : bf1[12] = bf0[12];
419 0 : bf1[13] =
420 0 : half_btf_avx2(&cospim16, &bf0[10], &cospi48, &bf0[13], &rounding, bit);
421 0 : bf1[14] =
422 0 : half_btf_avx2(&cospi48, &bf0[9], &cospi16, &bf0[14], &rounding, bit);
423 0 : bf1[15] = bf0[15];
424 0 : bf1[16] = _mm256_add_epi32(bf0[16], bf0[19]);
425 0 : bf1[17] = _mm256_add_epi32(bf0[17], bf0[18]);
426 0 : bf1[18] = _mm256_sub_epi32(bf0[17], bf0[18]);
427 0 : bf1[19] = _mm256_sub_epi32(bf0[16], bf0[19]);
428 0 : bf1[20] = _mm256_sub_epi32(bf0[23], bf0[20]);
429 0 : bf1[21] = _mm256_sub_epi32(bf0[22], bf0[21]);
430 0 : bf1[22] = _mm256_add_epi32(bf0[21], bf0[22]);
431 0 : bf1[23] = _mm256_add_epi32(bf0[20], bf0[23]);
432 0 : bf1[24] = _mm256_add_epi32(bf0[24], bf0[27]);
433 0 : bf1[25] = _mm256_add_epi32(bf0[25], bf0[26]);
434 0 : bf1[26] = _mm256_sub_epi32(bf0[25], bf0[26]);
435 0 : bf1[27] = _mm256_sub_epi32(bf0[24], bf0[27]);
436 0 : bf1[28] = _mm256_sub_epi32(bf0[31], bf0[28]);
437 0 : bf1[29] = _mm256_sub_epi32(bf0[30], bf0[29]);
438 0 : bf1[30] = _mm256_add_epi32(bf0[29], bf0[30]);
439 0 : bf1[31] = _mm256_add_epi32(bf0[28], bf0[31]);
440 :
441 : // stage 6
442 0 : bf0[0] = _mm256_add_epi32(bf1[0], bf1[3]);
443 0 : bf0[1] = _mm256_add_epi32(bf1[1], bf1[2]);
444 0 : bf0[2] = _mm256_sub_epi32(bf1[1], bf1[2]);
445 0 : bf0[3] = _mm256_sub_epi32(bf1[0], bf1[3]);
446 0 : bf0[4] = bf1[4];
447 0 : bf0[5] =
448 0 : half_btf_avx2(&cospim32, &bf1[5], &cospi32, &bf1[6], &rounding, bit);
449 0 : bf0[6] =
450 0 : half_btf_avx2(&cospi32, &bf1[5], &cospi32, &bf1[6], &rounding, bit);
451 0 : bf0[7] = bf1[7];
452 0 : bf0[8] = _mm256_add_epi32(bf1[8], bf1[11]);
453 0 : bf0[9] = _mm256_add_epi32(bf1[9], bf1[10]);
454 0 : bf0[10] = _mm256_sub_epi32(bf1[9], bf1[10]);
455 0 : bf0[11] = _mm256_sub_epi32(bf1[8], bf1[11]);
456 0 : bf0[12] = _mm256_sub_epi32(bf1[15], bf1[12]);
457 0 : bf0[13] = _mm256_sub_epi32(bf1[14], bf1[13]);
458 0 : bf0[14] = _mm256_add_epi32(bf1[13], bf1[14]);
459 0 : bf0[15] = _mm256_add_epi32(bf1[12], bf1[15]);
460 0 : bf0[16] = bf1[16];
461 0 : bf0[17] = bf1[17];
462 0 : bf0[18] =
463 0 : half_btf_avx2(&cospim16, &bf1[18], &cospi48, &bf1[29], &rounding, bit);
464 0 : bf0[19] =
465 0 : half_btf_avx2(&cospim16, &bf1[19], &cospi48, &bf1[28], &rounding, bit);
466 0 : bf0[20] =
467 0 : half_btf_avx2(&cospim48, &bf1[20], &cospim16, &bf1[27], &rounding, bit);
468 0 : bf0[21] =
469 0 : half_btf_avx2(&cospim48, &bf1[21], &cospim16, &bf1[26], &rounding, bit);
470 0 : bf0[22] = bf1[22];
471 0 : bf0[23] = bf1[23];
472 0 : bf0[24] = bf1[24];
473 0 : bf0[25] = bf1[25];
474 0 : bf0[26] =
475 0 : half_btf_avx2(&cospim16, &bf1[21], &cospi48, &bf1[26], &rounding, bit);
476 0 : bf0[27] =
477 0 : half_btf_avx2(&cospim16, &bf1[20], &cospi48, &bf1[27], &rounding, bit);
478 0 : bf0[28] =
479 0 : half_btf_avx2(&cospi48, &bf1[19], &cospi16, &bf1[28], &rounding, bit);
480 0 : bf0[29] =
481 0 : half_btf_avx2(&cospi48, &bf1[18], &cospi16, &bf1[29], &rounding, bit);
482 0 : bf0[30] = bf1[30];
483 0 : bf0[31] = bf1[31];
484 :
485 : // stage 7
486 0 : bf1[0] = _mm256_add_epi32(bf0[0], bf0[7]);
487 0 : bf1[1] = _mm256_add_epi32(bf0[1], bf0[6]);
488 0 : bf1[2] = _mm256_add_epi32(bf0[2], bf0[5]);
489 0 : bf1[3] = _mm256_add_epi32(bf0[3], bf0[4]);
490 0 : bf1[4] = _mm256_sub_epi32(bf0[3], bf0[4]);
491 0 : bf1[5] = _mm256_sub_epi32(bf0[2], bf0[5]);
492 0 : bf1[6] = _mm256_sub_epi32(bf0[1], bf0[6]);
493 0 : bf1[7] = _mm256_sub_epi32(bf0[0], bf0[7]);
494 0 : bf1[8] = bf0[8];
495 0 : bf1[9] = bf0[9];
496 0 : bf1[10] =
497 0 : half_btf_avx2(&cospim32, &bf0[10], &cospi32, &bf0[13], &rounding, bit);
498 0 : bf1[11] =
499 0 : half_btf_avx2(&cospim32, &bf0[11], &cospi32, &bf0[12], &rounding, bit);
500 0 : bf1[12] =
501 0 : half_btf_avx2(&cospi32, &bf0[11], &cospi32, &bf0[12], &rounding, bit);
502 0 : bf1[13] =
503 0 : half_btf_avx2(&cospi32, &bf0[10], &cospi32, &bf0[13], &rounding, bit);
504 0 : bf1[14] = bf0[14];
505 0 : bf1[15] = bf0[15];
506 0 : bf1[16] = _mm256_add_epi32(bf0[16], bf0[23]);
507 0 : bf1[17] = _mm256_add_epi32(bf0[17], bf0[22]);
508 0 : bf1[18] = _mm256_add_epi32(bf0[18], bf0[21]);
509 0 : bf1[19] = _mm256_add_epi32(bf0[19], bf0[20]);
510 0 : bf1[20] = _mm256_sub_epi32(bf0[19], bf0[20]);
511 0 : bf1[21] = _mm256_sub_epi32(bf0[18], bf0[21]);
512 0 : bf1[22] = _mm256_sub_epi32(bf0[17], bf0[22]);
513 0 : bf1[23] = _mm256_sub_epi32(bf0[16], bf0[23]);
514 0 : bf1[24] = _mm256_sub_epi32(bf0[31], bf0[24]);
515 0 : bf1[25] = _mm256_sub_epi32(bf0[30], bf0[25]);
516 0 : bf1[26] = _mm256_sub_epi32(bf0[29], bf0[26]);
517 0 : bf1[27] = _mm256_sub_epi32(bf0[28], bf0[27]);
518 0 : bf1[28] = _mm256_add_epi32(bf0[27], bf0[28]);
519 0 : bf1[29] = _mm256_add_epi32(bf0[26], bf0[29]);
520 0 : bf1[30] = _mm256_add_epi32(bf0[25], bf0[30]);
521 0 : bf1[31] = _mm256_add_epi32(bf0[24], bf0[31]);
522 :
523 : // stage 8
524 0 : bf0[0] = _mm256_add_epi32(bf1[0], bf1[15]);
525 0 : bf0[1] = _mm256_add_epi32(bf1[1], bf1[14]);
526 0 : bf0[2] = _mm256_add_epi32(bf1[2], bf1[13]);
527 0 : bf0[3] = _mm256_add_epi32(bf1[3], bf1[12]);
528 0 : bf0[4] = _mm256_add_epi32(bf1[4], bf1[11]);
529 0 : bf0[5] = _mm256_add_epi32(bf1[5], bf1[10]);
530 0 : bf0[6] = _mm256_add_epi32(bf1[6], bf1[9]);
531 0 : bf0[7] = _mm256_add_epi32(bf1[7], bf1[8]);
532 0 : bf0[8] = _mm256_sub_epi32(bf1[7], bf1[8]);
533 0 : bf0[9] = _mm256_sub_epi32(bf1[6], bf1[9]);
534 0 : bf0[10] = _mm256_sub_epi32(bf1[5], bf1[10]);
535 0 : bf0[11] = _mm256_sub_epi32(bf1[4], bf1[11]);
536 0 : bf0[12] = _mm256_sub_epi32(bf1[3], bf1[12]);
537 0 : bf0[13] = _mm256_sub_epi32(bf1[2], bf1[13]);
538 0 : bf0[14] = _mm256_sub_epi32(bf1[1], bf1[14]);
539 0 : bf0[15] = _mm256_sub_epi32(bf1[0], bf1[15]);
540 0 : bf0[16] = bf1[16];
541 0 : bf0[17] = bf1[17];
542 0 : bf0[18] = bf1[18];
543 0 : bf0[19] = bf1[19];
544 0 : bf0[20] =
545 0 : half_btf_avx2(&cospim32, &bf1[20], &cospi32, &bf1[27], &rounding, bit);
546 0 : bf0[21] =
547 0 : half_btf_avx2(&cospim32, &bf1[21], &cospi32, &bf1[26], &rounding, bit);
548 0 : bf0[22] =
549 0 : half_btf_avx2(&cospim32, &bf1[22], &cospi32, &bf1[25], &rounding, bit);
550 0 : bf0[23] =
551 0 : half_btf_avx2(&cospim32, &bf1[23], &cospi32, &bf1[24], &rounding, bit);
552 0 : bf0[24] =
553 0 : half_btf_avx2(&cospi32, &bf1[23], &cospi32, &bf1[24], &rounding, bit);
554 0 : bf0[25] =
555 0 : half_btf_avx2(&cospi32, &bf1[22], &cospi32, &bf1[25], &rounding, bit);
556 0 : bf0[26] =
557 0 : half_btf_avx2(&cospi32, &bf1[21], &cospi32, &bf1[26], &rounding, bit);
558 0 : bf0[27] =
559 0 : half_btf_avx2(&cospi32, &bf1[20], &cospi32, &bf1[27], &rounding, bit);
560 0 : bf0[28] = bf1[28];
561 0 : bf0[29] = bf1[29];
562 0 : bf0[30] = bf1[30];
563 0 : bf0[31] = bf1[31];
564 :
565 : // stage 9
566 0 : out[0 * 4 + col] = _mm256_add_epi32(bf0[0], bf0[31]);
567 0 : out[1 * 4 + col] = _mm256_add_epi32(bf0[1], bf0[30]);
568 0 : out[2 * 4 + col] = _mm256_add_epi32(bf0[2], bf0[29]);
569 0 : out[3 * 4 + col] = _mm256_add_epi32(bf0[3], bf0[28]);
570 0 : out[4 * 4 + col] = _mm256_add_epi32(bf0[4], bf0[27]);
571 0 : out[5 * 4 + col] = _mm256_add_epi32(bf0[5], bf0[26]);
572 0 : out[6 * 4 + col] = _mm256_add_epi32(bf0[6], bf0[25]);
573 0 : out[7 * 4 + col] = _mm256_add_epi32(bf0[7], bf0[24]);
574 0 : out[8 * 4 + col] = _mm256_add_epi32(bf0[8], bf0[23]);
575 0 : out[9 * 4 + col] = _mm256_add_epi32(bf0[9], bf0[22]);
576 0 : out[10 * 4 + col] = _mm256_add_epi32(bf0[10], bf0[21]);
577 0 : out[11 * 4 + col] = _mm256_add_epi32(bf0[11], bf0[20]);
578 0 : out[12 * 4 + col] = _mm256_add_epi32(bf0[12], bf0[19]);
579 0 : out[13 * 4 + col] = _mm256_add_epi32(bf0[13], bf0[18]);
580 0 : out[14 * 4 + col] = _mm256_add_epi32(bf0[14], bf0[17]);
581 0 : out[15 * 4 + col] = _mm256_add_epi32(bf0[15], bf0[16]);
582 0 : out[16 * 4 + col] = _mm256_sub_epi32(bf0[15], bf0[16]);
583 0 : out[17 * 4 + col] = _mm256_sub_epi32(bf0[14], bf0[17]);
584 0 : out[18 * 4 + col] = _mm256_sub_epi32(bf0[13], bf0[18]);
585 0 : out[19 * 4 + col] = _mm256_sub_epi32(bf0[12], bf0[19]);
586 0 : out[20 * 4 + col] = _mm256_sub_epi32(bf0[11], bf0[20]);
587 0 : out[21 * 4 + col] = _mm256_sub_epi32(bf0[10], bf0[21]);
588 0 : out[22 * 4 + col] = _mm256_sub_epi32(bf0[9], bf0[22]);
589 0 : out[23 * 4 + col] = _mm256_sub_epi32(bf0[8], bf0[23]);
590 0 : out[24 * 4 + col] = _mm256_sub_epi32(bf0[7], bf0[24]);
591 0 : out[25 * 4 + col] = _mm256_sub_epi32(bf0[6], bf0[25]);
592 0 : out[26 * 4 + col] = _mm256_sub_epi32(bf0[5], bf0[26]);
593 0 : out[27 * 4 + col] = _mm256_sub_epi32(bf0[4], bf0[27]);
594 0 : out[28 * 4 + col] = _mm256_sub_epi32(bf0[3], bf0[28]);
595 0 : out[29 * 4 + col] = _mm256_sub_epi32(bf0[2], bf0[29]);
596 0 : out[30 * 4 + col] = _mm256_sub_epi32(bf0[1], bf0[30]);
597 0 : out[31 * 4 + col] = _mm256_sub_epi32(bf0[0], bf0[31]);
598 : }
599 0 : }
600 :
601 0 : void av1_inv_txfm2d_add_32x32_avx2(const int32_t *coeff, uint16_t *output,
602 : int stride, int tx_type, int bd) {
603 : __m256i in[128], out[128];
604 0 : const TXFM_1D_CFG *row_cfg = NULL;
605 0 : const TXFM_1D_CFG *col_cfg = NULL;
606 :
607 0 : switch (tx_type) {
608 : case DCT_DCT:
609 0 : row_cfg = &inv_txfm_1d_row_cfg_dct_32;
610 0 : col_cfg = &inv_txfm_1d_col_cfg_dct_32;
611 0 : load_buffer_32x32(coeff, in);
612 0 : transpose_32x32(in, out);
613 0 : idct32_avx2(out, in, row_cfg->cos_bit[2]);
614 0 : round_shift_32x32(in, -row_cfg->shift[0]);
615 0 : transpose_32x32(in, out);
616 0 : idct32_avx2(out, in, col_cfg->cos_bit[2]);
617 0 : write_buffer_32x32(in, output, stride, 0, 0, -row_cfg->shift[1], bd);
618 0 : break;
619 0 : default: assert(0);
620 : }
621 0 : }
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